Interrupt Controller (IC)

Modules
	Setters

Data Structures
struct	scu_ic_priority
	SCU IC priority entry. More...

Typedefs
typedef enum scu_ic_interrupt	scu_ic_interrupt_t
	Interrupt vectors.
typedef enum scu_ic_mask	scu_ic_mask_t
	Mask values.
typedef enum scu_ic_status_reg	scu_ic_status_reg_t
	Interrupt status bits.
typedef struct scu_ic_priority	scu_ic_priority_t
	SCU IC priority entry.
typedef void(*	scu_ic_ihr_t) (void)
	Callback type.

Enumerations
enum	scu_ic_interrupt
	Interrupt vectors. More...
enum	scu_ic_mask
	Mask values. More...
enum	scu_ic_status_reg
	Interrupt status bits. More...

Functions
static void	scu_ic_ihr_set (scu_ic_interrupt_t vector, scu_ic_ihr_t ihr)
	Set the interrupt handler for the specified SCU related interrupt.
static void	scu_ic_ihr_clear (scu_ic_interrupt_t vector)
	Clear the interrupt handler for the specified SCU related interrupt.
static scu_ic_ihr_t	scu_ic_ihr_get (scu_ic_interrupt_t vector)
	Obtain the interrupt handler for the specified SCU related interrupt.
static void	scu_ic_mask_set (scu_ic_mask_t mask)
	Write a mask value the SCU I/O register IMS.
static void	scu_ic_mask_chg (scu_ic_mask_t and_mask, scu_ic_mask_t or_mask)
	Change the mask value in the SCU I/O register IMS.
static scu_ic_mask_t	scu_ic_mask_get (void)
	Obtain the SCU IMS mask.
static scu_ic_status_reg_t	scu_ic_status_get (void)
	Obtain the 32-bit SCU IST value.
static void	scu_ic_status_set (scu_ic_status_reg_t value)
	Write to the SCU IST register.
static void	scu_ic_status_chg (scu_ic_status_reg_t and_mask, scu_ic_status_reg_t or_mask)
	Change value in the SCU IST register.
static const scu_ic_priority_t *	scu_ic_priority_table_get (void)
	Obtain a read-only pointer to the priority table.
static void	scu_ic_priority_table_set (const scu_ic_priority_t *table)
	Set the priority table.

Detailed Description

Description goes here.

---

Data Structure Documentation

scu_ic_priority

struct scu_ic_priority

SCU IC priority entry.

Data Fields
uint16_t	sr_mask	CPU sr register priority level mask.
scu_ic_interrupt_t	scu_mask:16	SCU IMS mask.

Typedef Documentation

scu_ic_ihr_t

typedef void(* scu_ic_ihr_t) (void)

Callback type.

See also

scu_ic_ihr_set

Enumeration Type Documentation

scu_ic_interrupt

enum scu_ic_interrupt

Interrupt vectors.

Enumerator
SCU_IC_INTERRUPT_VBLANK_IN	VBLANK-IN interrupt.
SCU_IC_INTERRUPT_VBLANK_OUT	VBLANK-OUT interrupt.
SCU_IC_INTERRUPT_HBLANK_IN	HBLANK-IN interrupt.
SCU_IC_INTERRUPT_TIMER_0	SCU timer #0 interrupt.
SCU_IC_INTERRUPT_TIMER_1	SCU timer #1 interrupt.
SCU_IC_INTERRUPT_DSP_END	SCU-DSP Program end interrupt.
SCU_IC_INTERRUPT_SOUND_REQUEST	Sound request interrupt.
SCU_IC_INTERRUPT_SYSTEM_MANAGER	SMPC System manager interrupt.
SCU_IC_INTERRUPT_PAD_INTERRUPT	SMPC Pad interrupt.
SCU_IC_INTERRUPT_LEVEL_2_DMA_END	SCU-DMA level 2 end interrupt.
SCU_IC_INTERRUPT_LEVEL_1_DMA_END	SCU-DMA level 1 end interrupt.
SCU_IC_INTERRUPT_LEVEL_0_DMA_END	SCU-DMA level 0 end interrupt.
SCU_IC_INTERRUPT_DMA_ILLEGAL	SCU-DMA illegal interrupt.
SCU_IC_INTERRUPT_SPRITE_END	VDP1 sprite end interrupt.

scu_ic_mask

enum scu_ic_mask

Mask values.

Enumerator
SCU_IC_MASK_NONE	Value of 0.
SCU_IC_MASK_VBLANK_IN	VBLANK-IN mask.
SCU_IC_MASK_VBLANK_OUT	VBLANK-OUT mask.
SCU_IC_MASK_HBLANK_IN	HBLANK-IN mask.
SCU_IC_MASK_TIMER_0	SCU timer #0 mask.
SCU_IC_MASK_TIMER_1	SCU timer #1 mask.
SCU_IC_MASK_DSP_END	SCU-DSP Program end mask.
SCU_IC_MASK_SOUND_REQUEST	Sound request mask.
SCU_IC_MASK_SYSTEM_MANAGER	SMPC System manager mask.
SCU_IC_MASK_PAD_INTERRUPT	SMPC Pad mask.
SCU_IC_MASK_LEVEL_2_DMA_END	SCU-DMA level 2 end mask.
SCU_IC_MASK_LEVEL_1_DMA_END	SCU-DMA level 1 end mask.
SCU_IC_MASK_LEVEL_0_DMA_END	SCU-DMA level 0 end mask.
SCU_IC_MASK_DMA_ILLEGAL	SCU-DMA illegal mask.
SCU_IC_MASK_SPRITE_END	VDP1 sprite end mask.
SCU_IC_MASK_A_BUS	A-Bus mask.
SCU_IC_MASK_ALL	Defines all mask values.

scu_ic_status_reg

enum scu_ic_status_reg

Interrupt status bits.

Enumerator
SCU_IC_IST_NONE	Value of 0 (zero).
SCU_IC_IST_VBLANK_IN	HBLANK-IN status bit.
SCU_IC_IST_VBLANK_OUT	VBLANK-OUT status bit.
SCU_IC_IST_HBLANK_IN	HBLANK-IN status bit.
SCU_IC_IST_TIMER_0	SCU timer #0 status bit.
SCU_IC_IST_TIMER_1	SCU timer #1 status bit.
SCU_IC_IST_DSP_END	SCU-DSP Program end status bit.
SCU_IC_IST_SOUND_REQUEST	Sound request status bit.
SCU_IC_IST_SYSTEM_MANAGER	SMPC System manager status bit.
SCU_IC_IST_PAD_INTERRUPT	SMPC Pad status bit.
SCU_IC_IST_LEVEL_2_DMA_END	SCU-DMA level 2 end status bit.
SCU_IC_IST_LEVEL_1_DMA_END	SCU-DMA level 1 end status bit.
SCU_IC_IST_LEVEL_0_DMA_END	SCU-DMA level 0 end status bit.
SCU_IC_IST_DMA_ILLEGAL	SCU-DMA illegal status bit.
SCU_IC_IST_SPRITE_END	VDP1 sprite end status bit.
SCU_IC_IST_EXTERNAL_16	External interrupt status bit.
SCU_IC_IST_EXTERNAL_15	External interrupt status bit.
SCU_IC_IST_EXTERNAL_14	External interrupt status bit.
SCU_IC_IST_EXTERNAL_13	External interrupt status bit.
SCU_IC_IST_EXTERNAL_12	External interrupt status bit.
SCU_IC_IST_EXTERNAL_11	External interrupt status bit.
SCU_IC_IST_EXTERNAL_10	External interrupt status bit.
SCU_IC_IST_EXTERNAL_09	External interrupt status bit.
SCU_IC_IST_EXTERNAL_08	External interrupt status bit.
SCU_IC_IST_EXTERNAL_07	External interrupt status bit.
SCU_IC_IST_EXTERNAL_06	External interrupt status bit.
SCU_IC_IST_EXTERNAL_05	External interrupt status bit.
SCU_IC_IST_EXTERNAL_04	External interrupt status bit.
SCU_IC_IST_EXTERNAL_03	External interrupt status bit.
SCU_IC_IST_EXTERNAL_02	External interrupt status bit.
SCU_IC_IST_EXTERNAL_01	External interrupt status bit.

Function Documentation

scu_ic_ihr_set()

static void scu_ic_ihr_set ( scu_ic_interrupt_t  vector, scu_ic_ihr_t  ihr  )

inlinestatic

Set the interrupt handler for the specified SCU related interrupt.

This is a BIOS call. The function should not use rte to return, unlike cpu_intc_ihr_set.

It's possible to use cpu_intc_ihr_set to set an SCU related interrupt. However, the IST, as well as the IMS I/O registers need to be updated.

Below is the disassembly of the BIOS function.

0x06000794: shll2 r4
0x06000796: tst r5, r5
0x06000798: bf 0x0600079C
0x0600079A: mov.l @(0x014, pc), r5 ! 0x060007AC -> Pointer to empty handler
0x0600079C: mov.l @(0x008, pc), r0 ! 0x060007A4 -> Table of handlers at 0x06000A00
0x0600079E: rts
0x060007A0: mov.l r5, @(r0, r4)
0x060007A2: nop
0x060007A4: 0x06000900
0x060007A8: 0x20000600
0x060007AC: 0x0600083C

The actual handler is located at 0x060008F4:

0x060008F0: mov.l r0, @-r15
0x060008F2: mov #0x42, r0
0x060008F4: mov.l r1, @-r15        ! Start of handler
0x060008F6: mov.l @(0x064, pc), r1 ! 0x06000958 -> 0x06000348 (SCU interrupt mask)
0x060008F8: mov.l r2, @-r15
0x060008FA: mov.l @r1, r2
0x060008FC: mov.l r3, @-r15
0x060008FE: mov.l r2, @-r15        ! Store initial mask value for trampoline epilogue
0x06000900: mov.l r4, @-r15
0x06000902: mov.l @(0x060, pc), r3 ! 0x06000960 -> 0x06000980
0x06000904: mov.l r5, @-r15
0x06000906: shll2 r0
0x06000908: mov.l @(r0, r3), r3
0x0600090A: mov.l @(0x054, pc), r5 ! 0x0600095C -> 0x25FE00A0 (IMS I/O register)
0x0600090C: mov r3, r4
0x0600090E: shlr16 r3
0x06000910: ldc r3, sr
0x06000912: exts.w r4, r4
0x06000914: or r4, r2
0x06000916: mov.l r2, @r1
0x06000918: mov.l r2, @r5
0x0600091A: mov.l @(0x050, pc), r3 ! 0x06000968, value -> 0x06000900
0x0600091C: mov.l r6, @-r15
0x0600091E: mov.l @(r0, r3), r6
0x06000920: mov.l r7, @-r15
0x06000922: sts.l pr, @-r15
0x06000924: jsr @r6                ! Call user set handler
0x06000926: stc.l gbr, @-r15
0x06000928: ldc.l @r15+, gbr
0x0600092A: lds.l @r15+, pr
0x0600092C: mov.l @r15+, r7
0x0600092E: mov.w @(0x026, pc), r0 ! 0x06000954, value: 0x00F0
0x06000930: mov.l @r15+, r6
0x06000932: mov.l @(0x028, pc), r3 ! 0x06000958, value: 0x06000348
0x06000934: mov.l @r15+, r5
0x06000936: mov.l @(0x028, pc), r1 ! 0x0600095C, value: 0x25FE00A0
0x06000938: mov.l @r15+, r4
0x0600093A: mov.l @r15+, r2
0x0600093C: ldc r0, sr             ! Disables interrupts
0x0600093E: mov.l r2, @r3
0x06000940: mov.l @r15+, r3
0x06000942: mov.l r2, @r1
0x06000944: mov.l @r15+, r2
0x06000946: mov.l @r15+, r1
0x06000948: mov.l @r15+, r0
 
0x0600094A: rte                    ! Default handler
0x0600094C: nop

Warning

Do not use this function to set your interrupt handler, unless there is an explicit need to do so. To see which functions and macros to use for each interrupt, see Setters.

Parameters

vector	The vector number.
ihr	The interrupt handler.

scu_ic_ihr_clear()

static void scu_ic_ihr_clear ( scu_ic_interrupt_t  vector )

inlinestatic

Clear the interrupt handler for the specified SCU related interrupt.

This is a BIOS call.

Warning

Do not use this function to clear your interrupt handler, unless there is an explicit need to do so. To see which functions and macros to use for each interrupt, see Setters.

Parameters

vector

The vector number.

scu_ic_ihr_get()

static scu_ic_ihr_t scu_ic_ihr_get ( scu_ic_interrupt_t  vector )

inlinestatic

Obtain the interrupt handler for the specified SCU related interrupt.

This is a BIOS call.

Parameters

vector

The vector

Returns

Not yet documented.

scu_ic_mask_set()

static void scu_ic_mask_set ( scu_ic_mask_t  mask )

inlinestatic

Write a mask value the SCU I/O register IMS.

This is a BIOS call.

Parameters

mask	The 32-bit mask.

scu_ic_mask_chg()

static void scu_ic_mask_chg ( scu_ic_mask_t  and_mask, scu_ic_mask_t  or_mask  )

inlinestatic

Change the mask value in the SCU I/O register IMS.

The and_mask is the 32-bit mask value that enables/disables (masks) interrupts, while or_mask is the 32-bit mask value that enables interrupts.

Effectively, the function does the following,

SCU(IMS) = (SCU(IMS) & and_mask) | or_mask;

To disable (mask) the SCU_IC_MASK_VBLANK_IN interrupt,

scu_ic_mask_chg(SCU_IC_MASK_ALL, SCU_IC_MASK_VBLANK_IN);

To unmask (enable) SCU_IC_MASK_VBLANK_IN, but mask SCU_IC_MASK_SPRITE_END,

scu_ic_mask_chg(SCU_IC_MASK_ALL & ~SCU_IC_MASK_VBLANK_IN, SCU_IC_MASK_SPRITE_END);

To mask all interrupts,

scu_ic_mask_chg(SCU_IC_MASK_NONE, SCU_IC_MASK_ALL);

To unmask all interrupts:

scu_ic_mask_chg(SCU_IC_MASK_NONE, SCU_IC_MASK_NONE);

This is a BIOS call.

Parameters

and_mask	The bitwise AND mask.
or_mask	The bitwise OR mask.

scu_ic_mask_get()

static scu_ic_mask_t scu_ic_mask_get ( void  )

inlinestatic

Obtain the SCU IMS mask.

This is a BIOS call.

Returns

The 32-bit mask value.

scu_ic_status_get()

static scu_ic_status_reg_t scu_ic_status_get ( void  )

inlinestatic

Obtain the 32-bit SCU IST value.

Returns

The 32-bit SCU IST value.

scu_ic_status_set()

static void scu_ic_status_set ( scu_ic_status_reg_t  value )

inlinestatic

Write to the SCU IST register.

Below describes what happens when reading and writing to the IST register:

Access	Status	Result
Read	0	Interrupt does not occur
	1	Interrupt does occur
Write	0	Reset interrupt
	1	Maintains current interrupt status

Parameters

value

The 32-bit-value.

scu_ic_status_chg()

static void scu_ic_status_chg ( scu_ic_status_reg_t  and_mask, scu_ic_status_reg_t  or_mask  )

inlinestatic

Change value in the SCU IST register.

This function behaves exactly in the same way as scu_ic_mask_chg, except the SCU IST is changed.

Parameters

and_mask	The bitwise AND mask.
or_mask	The bitwise OR mask.

scu_ic_priority_table_get()

static const scu_ic_priority_t * scu_ic_priority_table_get ( void  )

inlinestatic

Obtain a read-only pointer to the priority table.

The priority table is 128 bytes. Each priority table entry is 32-bits and is split between SR and SCU interrupt mask. Upper 16-bits is the SR interrupt mask value, and the lower 16-bits is the SCU interrupt mask value and is signed extended.

As an exmple, for HBLANK-IN, disable all interrupts, but allow VBLANK-IN and VBLANK-OUT.

Below is the decoded table:

Vector	SR	SCU	SCU Interrupt	Value
0x40	0x00F0	0xFFFF	VBLANK-IN	Mask all
0x41	0x00E0	0xFFFE	VBLANK-OUT	Mask all, allow VBLANK-IN
0x42	0x00D0	0xFFFC	HBLANK-IN	Mask all, allow VBLANK-IN, VBLANK-OUT
0x43	0x00C0	0xFFF8	Timer 0	Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN
0x44	0x00B0	0xFFF0	Timer 1	Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0
0x45	0x00A0	0xFFE0	DSP End	Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1
0x46	0x0090	0xFFC0	Sound Request	Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End
0x47	0x0080	0xFF80	System Manager	Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request
0x48	0x0080	0xFF80	Pad Interrupt	Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request
0x49	0x0070	0xFE00	Level 2 DMA End	Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x4A	0x0070	0xFE00	Level 1 DMA End	Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x4B	0x0070	0xFE00	Level 0 DMA End	Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x4C	0x0070	0xFE00	DMA Illegal	Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x4D	0x0070	0xFE00	Sprite End	Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x4E	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x4F	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x50	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x51	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x52	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x53	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x54	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x55	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x56	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x57	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x58	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x59	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x5A	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x5B	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x5C	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x5D	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x5E	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt
0x5F	0x0070	0xFE00		Mask all, allow VBLANK-IN, VBLANK-OUT, HBLANK-IN, Timer 0, Timer 1, DSP End, Sound Request, Pad Interrupt

This is a BIOS call.

Returns

A read-only pointer to the priority table.

scu_ic_priority_table_set()

static void scu_ic_priority_table_set ( const scu_ic_priority_t *  table )

inlinestatic

Set the priority table.

For a detailed explanation, see scu_ic_priority_table_get.

The size of the table is irrelevant, as only 128 bytes will be considered.

This is a BIOS call.

Parameters

table

Pointer to the priority table.