0.3.1
Macros
Offset Accessors
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Macros

#define ARP(x)   (0x22000000UL + (x))
 Specify offset x for address space.
 
#define DRAM(t, b, x)    (CS0(x) | ((((t) & 0x01) + 2) << 21) | (((b) & 0x03) << 19))
 Specify triple for DRAM address space.
 
#define USB_CART(x)   (CS0(0x01) + ((x) << 20))
 Access the CPU I/O registers.
 
#define CS0(x)   (0x22000000UL + (x))
 Specify offset x for address space.
 
#define CS1(x)   (0x24000000UL + (x))
 Specify offset x for address space.
 
#define DUMMY(x)   (0x25000000UL + (x))
 Specify offset x for address space.
 
#define CS2(x)   (0x25800000UL + (x))
 Specify offset x for address space.
 
#define CD_BLOCK(x)   (0x25890000UL + (x))
 Specify offset x for address space.
 
#define SCSP(x)   (0x25B00000UL + (x))
 Specify offset x for address space.
 
#define VDP1_VRAM(x)   (0x25C00000UL + (x))
 Specify offset x for address space.
 
#define VDP1_FB(x)   (0x25C80000UL + (x))
 Specify offset x for address space.
 
#define VDP1(x)   (0x25D00000UL + (x))
 Specify offset x for address space.
 
#define VDP1_IOREG_BASE   VDP1(0x00000000)
 Base VDP1 address, for use with vdp1_ioregs.
 
#define VDP2_VRAM(x)   (0x25E00000UL + (x))
 Specify offset x for address space.
 
#define VDP2_CRAM(x)   (0x25F00000UL + (x))
 Specify offset x for address space.
 
#define VDP2(x)   (0x25F80000UL + (x))
 Specify offset x for address space.
 
#define VDP2_IOREG_BASE   VDP2(0x00000000)
 Base VDP2 address, for use with vdp2_ioregs.
 
#define SCU(x)   (0x25FE0000UL + (x))
 Specify offset x for address space.
 
#define SCU_IOREG_BASE   SCU(0x00000000)
 Base SCU address, for use with scu_ioregs.
 
#define HWRAM(x)   (0x06000000UL + (x))
 Specify offset x for address space.
 
#define HWRAM_UNCACHED(x)   (0x26000000UL + (x))
 Specify offset x for uncached address space.
 
#define HWRAM_PURGE_CACHE(x)   (0x46000000UL + (x))
 Specify offset x to purge cache lines of address x.
 
#define HWRAM_SIZE   0x00100000UL
 Total size of H-WRAM in bytes.
 
#define LWRAM(x)   (0x00200000UL + (x))
 Specify offset x for address space.
 
#define LWRAM_UNCACHED(x)   (0x20200000UL + (x))
 Specify offset x for uncached address space.
 
#define LWRAM_PURGE_CACHE(x)   (0x40200000UL + (x))
 Specify offset x to purge cache lines of address x.
 
#define LWRAM_SIZE   0x00100000UL
 Total size of L-WRAM in bytes.
 
#define MINIT   (0x21000000UL)
 Master CPU address for slave CPU notification.
 
#define SINIT   (0x21800000UL)
 Save CPU address for master CPU notification.
 
#define CPU(x)   (0xFFFFF000UL + (x))
 Access the CPU I/O registers.
 
#define CPU_IOREG_BASE   CPU(0x00000E00UL)
 Base CPU address, for use with cpu_ioregs.
 
#define IREG(x)   (0x20100001UL + ((x) << 1))
 Access the SMPC 7 IREG I/O registers.
 
#define OREG(x)   (0x20100021UL + ((x) << 1))
 Access the SMPC 32 OREG I/O registers.
 
#define SMPC(x)   (0x20100000UL + (x))
 Access the SMPC I/O registers.
 

Detailed Description

Macro Definition Documentation

◆ ARP

#define ARP (   x)    (0x22000000UL + (x))

Specify offset x for address space.

Parameters
xThe byte offset.

◆ DRAM

#define DRAM (   t,
  b,
  x 
)     (CS0(x) | ((((t) & 0x01) + 2) << 21) | (((b) & 0x03) << 19))

Specify triple for DRAM address space.

Parameters
tThe two DRAM banks when 32-Mbit.
bThe four DRAM banks within two larger DRAM banks, 8-MBit each.
xThe byte offset.

◆ USB_CART

#define USB_CART (   x)    (CS0(0x01) + ((x) << 20))

Access the CPU I/O registers.

Parameters
xThe byte offset.

◆ CS0

#define CS0 (   x)    (0x22000000UL + (x))

Specify offset x for address space.

Parameters
xThe byte offset.

◆ CS1

#define CS1 (   x)    (0x24000000UL + (x))

Specify offset x for address space.

Parameters
xThe byte offset.

◆ DUMMY

#define DUMMY (   x)    (0x25000000UL + (x))

Specify offset x for address space.

Parameters
xThe byte offset.

◆ CS2

#define CS2 (   x)    (0x25800000UL + (x))

Specify offset x for address space.

Parameters
xThe byte offset.

◆ CD_BLOCK

#define CD_BLOCK (   x)    (0x25890000UL + (x))

Specify offset x for address space.

Parameters
xThe byte offset.

◆ SCSP

#define SCSP (   x)    (0x25B00000UL + (x))

Specify offset x for address space.

Parameters
xThe byte offset.

◆ VDP1_VRAM

#define VDP1_VRAM (   x)    (0x25C00000UL + (x))

Specify offset x for address space.

Parameters
xThe byte offset.

◆ VDP1_FB

#define VDP1_FB (   x)    (0x25C80000UL + (x))

Specify offset x for address space.

Parameters
xThe byte offset.

◆ VDP1

#define VDP1 (   x)    (0x25D00000UL + (x))

Specify offset x for address space.

Parameters
xThe byte offset.

◆ VDP2_VRAM

#define VDP2_VRAM (   x)    (0x25E00000UL + (x))

Specify offset x for address space.

Parameters
xThe byte offset.

◆ VDP2_CRAM

#define VDP2_CRAM (   x)    (0x25F00000UL + (x))

Specify offset x for address space.

Parameters
xThe byte offset.

◆ VDP2

#define VDP2 (   x)    (0x25F80000UL + (x))

Specify offset x for address space.

Parameters
xThe byte offset.

◆ SCU

#define SCU (   x)    (0x25FE0000UL + (x))

Specify offset x for address space.

Parameters
xThe byte offset.

◆ HWRAM

#define HWRAM (   x)    (0x06000000UL + (x))

Specify offset x for address space.

Parameters
xThe byte offset.

◆ HWRAM_UNCACHED

#define HWRAM_UNCACHED (   x)    (0x26000000UL + (x))

Specify offset x for uncached address space.

Parameters
xThe byte offset.

◆ HWRAM_PURGE_CACHE

#define HWRAM_PURGE_CACHE (   x)    (0x46000000UL + (x))

Specify offset x to purge cache lines of address x.

Parameters
xThe byte offset.

◆ LWRAM

#define LWRAM (   x)    (0x00200000UL + (x))

Specify offset x for address space.

Parameters
xThe byte offset.

◆ LWRAM_UNCACHED

#define LWRAM_UNCACHED (   x)    (0x20200000UL + (x))

Specify offset x for uncached address space.

Parameters
xThe byte offset.

◆ LWRAM_PURGE_CACHE

#define LWRAM_PURGE_CACHE (   x)    (0x40200000UL + (x))

Specify offset x to purge cache lines of address x.

Parameters
xThe byte offset.

◆ CPU

#define CPU (   x)    (0xFFFFF000UL + (x))

Access the CPU I/O registers.

Parameters
xThe byte offset.

◆ IREG

#define IREG (   x)    (0x20100001UL + ((x) << 1))

Access the SMPC 7 IREG I/O registers.

Parameters
xThe IREG number.
Warning
Byte access writes only.
See also
MEMORY_WRITE

◆ OREG

#define OREG (   x)    (0x20100021UL + ((x) << 1))

Access the SMPC 32 OREG I/O registers.

Parameters
xThe OREG number.
Warning
Byte access reads only.
See also
MEMORY_READ

◆ SMPC

#define SMPC (   x)    (0x20100000UL + (x))

Access the SMPC I/O registers.

Parameters
xThe byte offset.
See also
MEMORY_READ
MEMORY_WRITE