Data Structures
struct	cpu_dmac_cfg
	CPU-DMAC configuration. More...

struct	cpu_dmac_status
	CPU-DMAC status. More...

Macros
#define	CPU_DMAC_CHANNEL_COUNT (2)
	The number of CPU-DMAC channels.

Typedefs
typedef enum cpu_dmac_priority_mode	cpu_dmac_priority_mode_t
	CPU-DMAC priority mode.

typedef enum cpu_dmac_src	cpu_dmac_src_t
	Transfer source address modes.

typedef enum cpu_dmac_dst	cpu_dmac_dst_t
	Transfer destination type.

typedef enum cpu_dmac_stride	cpu_dmac_stride_t
	Transfer stride bytes.

typedef enum cpu_dmac_request_mode	cpu_dmac_request_mode_t
	Request mode.

typedef enum cpu_dmac_dack_mode	cpu_dmac_dack_mode_t
	Acknowledge mode.

typedef enum cpu_dmac_dack_level	cpu_dmac_dack_level_t
	Acknowledge level.

typedef enum cpu_dmac_detect_mode	cpu_dmac_detect_mode_t
	Detect mode.

typedef enum cpu_dmac_dreq_level	cpu_dmac_dreq_level_t
	Request level.

typedef enum cpu_dmac_bus_mode	cpu_dmac_bus_mode_t
	Transfer bus mode.

typedef enum cpu_dmac_resource_select	cpu_dmac_resource_select_t
	Requests resource select.

typedef void(*	cpu_dmac_ihr_t) (void *)
	Callback type.

typedef uint32_t	cpu_dmac_channel_t
	CPU-DMAC channel.

typedef struct cpu_dmac_cfg	cpu_dmac_cfg_t
	Foo.

typedef struct cpu_dmac_status	cpu_dmac_status_t
	CPU-DMAC status.

Enumerations
enum	cpu_dmac_priority_mode
	CPU-DMAC priority mode. More...

enum	cpu_dmac_src
	Transfer source address modes. More...

enum	cpu_dmac_dst
	Transfer destination type. More...

enum	cpu_dmac_stride
	Transfer stride bytes. More...

enum	cpu_dmac_request_mode
	Request mode. More...

enum	cpu_dmac_dack_mode
	Acknowledge mode. More...

enum	cpu_dmac_dack_level
	Acknowledge level. More...

enum	cpu_dmac_detect_mode
	Detect mode. More...

enum	cpu_dmac_dreq_level
	Request level. More...

enum	cpu_dmac_bus_mode
	Transfer bus mode. More...

enum	cpu_dmac_resource_select
	Requests resource select. More...

Functions
static void	cpu_dmac_channel_transfer_set (cpu_dmac_channel_t ch, uint32_t tcr_bits)
	Write directly to the CPU-DMAC I/O TCR0 or TCR1 register.

static void	cpu_dmac_enable (void)
	Enable CPU-DMAC.

static void	cpu_dmac_disable (void)
	Disable CPU-DMAC.

static uint8_t	cpu_dmac_interrupt_priority_get (void)
	Obtain the interrupt priority level for CPU-DMAC.

static void	cpu_dmac_interrupt_priority_set (uint8_t priority)
	Set the interrupt priority level for CPU-DMAC.

static void	cpu_dmac_priority_mode_set (cpu_dmac_priority_mode_t mode)
	Set the priority mode.

static void	cpu_dmac_channel_start (cpu_dmac_channel_t ch)
	Start the CPU-DMAC channel transfer.

static void	cpu_dmac_channel_stop (cpu_dmac_channel_t ch)
	Stop specific CPU-DMAC channel transfer.

static void	cpu_dmac_stop (void)
	Stop all CPU-DMAC channel transfers (if any).

void	cpu_dmac_status_get (cpu_dmac_status_t *status)
	Obtain CPU-DMAC operation status.

void	cpu_dmac_channel_config_set (const cpu_dmac_cfg_t *cfg)
	Configure a CPU-DMAC channel for transfer.

void	cpu_dmac_channel_wait (cpu_dmac_channel_t ch)
	Busy wait for transfer completion of CPU-DMAC channel.

void	cpu_dmac_transfer (cpu_dmac_channel_t ch, void dst, const void src, size_t size)
	Memory copy using CPU-DMAC using `ref` channel.

void	cpu_dmac_transfer_wait (cpu_dmac_channel_t ch)
	Wait for memory copy to complete.

void	cpu_dmac_memset (cpu_dmac_channel_t ch, void *dst, uint32_t value, size_t size)
	Memory clear using CPU-DMAC using `ref` channel.

Detailed Description

Description goes here.

Data Structure Documentation

◆ cpu_dmac_cfg

struct cpu_dmac_cfg

CPU-DMAC configuration.

Data Fields
cpu_dmac_channel_t	channel:2	Channel.
cpu_dmac_src_t	src_mode:2	Source mode.
cpu_dmac_dst_t	dst_mode:2	Destination mode.
cpu_dmac_stride_t	stride:3	Stride.
cpu_dmac_request_mode_t	request_mode:1	Request mode. Note This is a non-default flag. See also cpu_dmac_cfg_t.non_default
cpu_dmac_dack_mode_t	dack_mode:1	Acknowledge mode. Note This is a non-default flag. See also cpu_dmac_cfg_t.non_default
cpu_dmac_dack_level_t	dack_level:1	Acknowledge level. Note This is a non-default flag. See also cpu_dmac_cfg_t.non_default
cpu_dmac_detect_mode_t	detect_mode:1	Detect mode. Note This is a non-default flag. See also cpu_dmac_cfg_t.non_default
cpu_dmac_dreq_level_t	dreq_level:1	Request level. Note This is a non-default flag. See also cpu_dmac_cfg_t.non_default
cpu_dmac_bus_mode_t	bus_mode:1	Bus mode. Note This is a non-default flag. See also cpu_dmac_cfg_t.non_default
cpu_dmac_resource_select_t	resource_select:2	Resource select. Note This is a non-default flag. See also cpu_dmac_cfg_t.non_default
bool	non_default:1	Enable this flag to use non-default settings. See also cpu_dmac_cfg_t.request_mode cpu_dmac_cfg_t.dack_mode cpu_dmac_cfg_t.dack_level cpu_dmac_cfg_t.detect_mode cpu_dmac_cfg_t.dreq_level cpu_dmac_cfg_t.resource_select
uint32_t	src	Memory transfer source address.
uint32_t	dst	Memory transfer destination address.
uint32_t	len	Transfer length.
cpu_dmac_ihr_t	ihr	Callback when transfer is completed. Set to `NULL` if no callback is desired.
void *	ihr_work	Pointer to any work passed onto cpu_dmac_cfg::ihr. If cpu_dmac_cfg::ihr is `NULL`, cpu_dmac_cfg::ihr_work is ignored.

◆ cpu_dmac_status

struct cpu_dmac_status

CPU-DMAC status.

Data Fields
bool	enabled:1	Flag to determine if CPU-DMAC transfers are enabled on all channels.
cpu_dmac_priority_mode_t	priority_mode:1	Priority mode.
unsigned int	channel_enabled:2	Bit field to determine which channel(s) are enabled.
unsigned int	channel_busy:2	Bit field to determine which channel(s) are busy.
bool	address_error:1	Flag to determine if an address error has occurred.
bool	nmi_interrupt:1	Flag to determine if NMI interrupt has occurred.

Typedef Documentation

◆ cpu_dmac_dack_level_t

typedef enum cpu_dmac_dack_level cpu_dmac_dack_level_t

Acknowledge level.

See also: cpu_dmac_cfg_t

◆ cpu_dmac_detect_mode_t

typedef enum cpu_dmac_detect_mode cpu_dmac_detect_mode_t

Detect mode.

See also: cpu_dmac_cfg_t

◆ cpu_dmac_dreq_level_t

typedef enum cpu_dmac_dreq_level cpu_dmac_dreq_level_t

Request level.

See also: cpu_dmac_cfg_t

◆ cpu_dmac_bus_mode_t

typedef enum cpu_dmac_bus_mode cpu_dmac_bus_mode_t

Transfer bus mode.

See also: cpu_dmac_cfg_t

◆ cpu_dmac_resource_select_t

typedef enum cpu_dmac_resource_select cpu_dmac_resource_select_t

Requests resource select.

See also: cpu_dmac_cfg_t

◆ cpu_dmac_ihr_t

typedef void(* cpu_dmac_ihr_t) (void *)

Callback type.

See also: cpu_dmac_cfg_t.ihr; cpu_dmac_cfg_t.ihr_work

Enumeration Type Documentation

◆ cpu_dmac_priority_mode

enum cpu_dmac_priority_mode

CPU-DMAC priority mode.

See also: cpu_dmac_priority_mode_set

Enumerator

CPU_DMAC_PRIORITY_MODE_FIXED

Fixed priority mode.

@details Channel #0 has higher priority over channel #1.

CPU_DMAC_PRIORITY_MODE_ROUND_ROBIN

Round-robin mode.

◆ cpu_dmac_src

enum cpu_dmac_src

Transfer source address modes.

See also: cpu_dmac_cfg_t

Enumerator
CPU_DMAC_SOURCE_FIXED	Fixed source address.
CPU_DMAC_SOURCE_INCREMENT	Source address is incremented.
CPU_DMAC_SOURCE_DECREMENT	Source address is decremented.

◆ cpu_dmac_dst

enum cpu_dmac_dst

Transfer destination type.

See also: cpu_dmac_cfg_t

Enumerator
CPU_DMAC_DESTINATION_FIXED	Fixed destination address.
CPU_DMAC_DESTINATION_INCREMENT	Destination address is incremented.
CPU_DMAC_DESTINATION_DECREMENT	Destination address is decremented.

◆ cpu_dmac_stride

enum cpu_dmac_stride

Transfer stride bytes.

See also: cpu_dmac_cfg_t

Enumerator
CPU_DMAC_STRIDE_1_BYTE	1-byte stride.
CPU_DMAC_STRIDE_2_BYTES	2-byte stride.
CPU_DMAC_STRIDE_4_BYTES	4-byte stride.
CPU_DMAC_STRIDE_16_BYTES	16-byte stride.

◆ cpu_dmac_request_mode

enum cpu_dmac_request_mode

Request mode.

See also: cpu_dmac_cfg_t

Enumerator

CPU_DMAC_REQUEST_MODE_MODULE

Module request mode.

@details Requests are generated by SCI peripherial.

CPU_DMAC_REQUEST_MODE_AUTO

Auto request mode.

@details Requests are generated by DMAC internally.

◆ cpu_dmac_dack_mode

enum cpu_dmac_dack_mode

Acknowledge mode.

See also: cpu_dmac_cfg_t

Enumerator
CPU_DMAC_DACK_MODE_READ	Module request mode (requests are generated by SCI).
CPU_DMAC_DACK_MODE_WRITE	Auto request mode (requests are generated by DMAC).

◆ cpu_dmac_dack_level

enum cpu_dmac_dack_level

Acknowledge level.

See also: cpu_dmac_cfg_t

Enumerator
CPU_DMAC_DACK_LEVEL_LOW	Module request mode (requests are generated by SCI).
CPU_DMAC_DACK_LEVEL_HIGH	Auto request mode (requests are generated by DMAC).

◆ cpu_dmac_detect_mode

enum cpu_dmac_detect_mode

Detect mode.

See also: cpu_dmac_cfg_t

Enumerator
CPU_DMAC_DETECT_MODE_LEVEL	Level detection mode.
CPU_DMAC_DETECT_MODE_EDGE	Edge detection mode.

◆ cpu_dmac_dreq_level

enum cpu_dmac_dreq_level

Request level.

See also: cpu_dmac_cfg_t

Enumerator
CPU_DMAC_DREQ_LEVEL_LOW	Module request mode (requests are generated by SCI).
CPU_DMAC_DREQ_LEVEL_HIGH	Auto request mode (requests are generated by DMAC).

◆ cpu_dmac_bus_mode

enum cpu_dmac_bus_mode

Transfer bus mode.

See also: cpu_dmac_cfg_t

Enumerator
CPU_DMAC_BUS_MODE_CYCLE_STEAL	Select bus mode to cycle-steal mode.
CPU_DMAC_BUS_MODE_BURST	Select bus mode to burst mode.

◆ cpu_dmac_resource_select

enum cpu_dmac_resource_select

Requests resource select.

See also: cpu_dmac_cfg_t

Enumerator
CPU_DMAC_RESOURCE_SELECT_DREQ	Use DREQ requests.
CPU_DMAC_RESOURCE_SELECT_RXI	Use RXI requests from SCI.
CPU_DMAC_RESOURCE_SELECT_TXI	Use TXI requests from SCI.

Function Documentation

◆ cpu_dmac_channel_transfer_set()

static void cpu_dmac_channel_transfer_set	(	cpu_dmac_channel_t	ch,
		uint32_t	tcr_bits
	)

inlinestatic

Write directly to the CPU-DMAC I/O TCR0 or TCR1 register.

This function is not enough to set up a proper transfer. Use cpu_dmac_channel_config_set to configure a transfer. The purpose of this function is to quickly reset a transfer by just setting the transfer length.

There is no waiting if the CPU-DMAC or the specific channel ch is operating.

While this function resets the transfer length, it does not start the transfer again. For that, use cpu_dmac_channel_start.

Parameters

ch	The channel.
tcr_bits	The 4-byte I/O register value.

See also: cpu_dmac_channel_config_set; cpu_dmac_channel_start

◆ cpu_dmac_interrupt_priority_get()

static uint8_t cpu_dmac_interrupt_priority_get ( void )

inlinestatic

Obtain the interrupt priority level for CPU-DMAC.

Returns: The interrupt priority level ranging from 0 to 15.

◆ cpu_dmac_interrupt_priority_set()

static void cpu_dmac_interrupt_priority_set ( uint8_t priority )

inlinestatic

Set the interrupt priority level for CPU-DMAC.

Parameters

priority The priority ranging from 0 to 15.

◆ cpu_dmac_priority_mode_set()

static void cpu_dmac_priority_mode_set ( cpu_dmac_priority_mode_t mode )

inlinestatic

Set the priority mode.

Parameters

mode	The priority mode.

◆ cpu_dmac_channel_start()

static void cpu_dmac_channel_start ( cpu_dmac_channel_t ch )

inlinestatic

Start the CPU-DMAC channel transfer.

There is no check if the CPU-DMAC channel ch is currently operating.

There is no check if the CPU-DMAC channel ch has been configured.

Parameters

ch

◆ cpu_dmac_channel_stop()

static void cpu_dmac_channel_stop ( cpu_dmac_channel_t ch )

inlinestatic

Stop specific CPU-DMAC channel transfer.

Parameters

ch	The channel.

◆ cpu_dmac_status_get()

void cpu_dmac_status_get ( cpu_dmac_status_t * status )

Obtain CPU-DMAC operation status.

If status is NULL, the status will not be updated.

Parameters

[out] status The pointer to cpu_dmac_status

◆ cpu_dmac_channel_config_set()

void cpu_dmac_channel_config_set ( const cpu_dmac_cfg_t * cfg )

Configure a CPU-DMAC channel for transfer.

Configuring the CPU-DMAC channel in cfg does start the transfer. To start the transfer, use cpu_dmac_channel_start.

The CPU-DMAC channel is forcefully stopped upon starting the configuration. If the channel is currently operating, use cpu_dmac_channel_wait to wait until the transfer is complete.

Parameters

[in] cfg The CPU-DMAC transfer configuration.

See also: cpu_dmac_channel_start; cpu_dmac_channel_stop; cpu_dmac_channel_wait; cpu_dmac_channel_transfer_set

◆ cpu_dmac_channel_wait()

void cpu_dmac_channel_wait ( cpu_dmac_channel_t ch )

Busy wait for transfer completion of CPU-DMAC channel.

There is no waiting if the CPU-DMAC or the specific channel ch is disabled.

Parameters

ch	The channel.

◆ cpu_dmac_transfer()

void cpu_dmac_transfer	(	cpu_dmac_channel_t	ch,
		void *	dst,
		const void *	src,
		size_t	size
	)

Memory copy using CPU-DMAC using ref channel.

Parameters

	ch	The channel.
[in]	dst	The destination address to copy to.
[in]	src	The source address to copy from.
	size	The amount of bytes to clear.

◆ cpu_dmac_transfer_wait()

void cpu_dmac_transfer_wait ( cpu_dmac_channel_t ch )

Wait for memory copy to complete.

Parameters

ch	The channel.

◆ cpu_dmac_memset()

void cpu_dmac_memset	(	cpu_dmac_channel_t	ch,
		void *	dst,
		uint32_t	value,
		size_t	size
	)

Memory clear using CPU-DMAC using ref channel.

Parameters

	ch	The channel.
[in]	dst	The destination address to clear.
	value	The value to write.
	size	The amount of bytes to clear.

Data Structures

Macros

Typedefs

Enumerations

Functions

Detailed Description

Data Structure Documentation

◆ cpu_dmac_cfg

◆ cpu_dmac_status

Typedef Documentation

◆ cpu_dmac_dack_level_t

◆ cpu_dmac_detect_mode_t

◆ cpu_dmac_dreq_level_t

◆ cpu_dmac_bus_mode_t

◆ cpu_dmac_resource_select_t

◆ cpu_dmac_ihr_t

Enumeration Type Documentation

◆ cpu_dmac_priority_mode

◆ cpu_dmac_src

◆ cpu_dmac_dst

◆ cpu_dmac_stride

◆ cpu_dmac_request_mode

◆ cpu_dmac_dack_mode

◆ cpu_dmac_dack_level

◆ cpu_dmac_detect_mode

◆ cpu_dmac_dreq_level

◆ cpu_dmac_bus_mode

◆ cpu_dmac_resource_select

Function Documentation

◆ cpu_dmac_channel_transfer_set()

◆ cpu_dmac_interrupt_priority_get()

◆ cpu_dmac_interrupt_priority_set()

◆ cpu_dmac_priority_mode_set()

◆ cpu_dmac_channel_start()

◆ cpu_dmac_channel_stop()

◆ cpu_dmac_status_get()

◆ cpu_dmac_channel_config_set()

◆ cpu_dmac_channel_wait()

◆ cpu_dmac_transfer()

◆ cpu_dmac_transfer_wait()

◆ cpu_dmac_memset()